Recently, with the boom of artificial intelligence (AI) algorithms, the EDA community is actively exploring AI for IC techniques for the design of advanced chips. Many studies have explored machine learning (ML) based techniques for cross-stage prediction tasks in the design flow to achieve faster design convergence. For example, Google published a paper in Nature in 2021 entitled "A graph placement methodology for fast chip design", leveraging reinforcement learning (RL) to place macros in a chip design.

The basic idea is to regard the chip layout as a Go board, while each macro as a stone. In this way, an RL agent can be pre-trained with 10,000 internal design samples and learn to place one macro at a time. By finetuning the agent on each design for around 6 hours, it can outperform the performance of conventional EDA tools on Google's TPU chips, and achieve better performance, power, and area (PPA).

It can be seen that "AI for EDA" is being actively explored in the design automation community. Although building ML models usually requires a large amount of data, most studies can only generate small internal datasets for validation, due to the lack of large public datasets and the difficulty in data generation. To this end, an open-source dataset dedicated to ML tasks in EDA is urgently desired.