Researchers are exploring on the p-bit trail
(Tech Xplore)—Welcome to the heady world of finding new ways of computing.
Samuel Moore, senior editor at IEEE Spectrum, reported on the work of engineers at Purdue and University of California, Berkeley. They have turned their attention to "a computing element that could lead to some truly strange circuits: logic that can perform its inverse operation," reported Moore.
Greg Synek in TechSpot called attention to why this was so interesting:
"Modern encryption relies upon the fact that certain mathematical operations are inherently difficult to undo with an inverse action. Current generation hardware typically has a set of inputs and a set of outputs to handle the computation required by encryption algorithms. Importantly, there is no way to reverse the actions performed in hardware without major efforts and a lot of time."
Whereas, in the researchers' focal point, "Imagine if there were hardware that could actually run in reverse. It would be almost trivial to obtain the original input," wrote Synek. "Engineers from Purdue University and University of California at Berkeley have taken us one step closer to this possibility." Circuits were designed with the help of simulations to have an adjustable degree of randomness, he said.
Supriyo Datta and colleagues Kerem Camsari and Sayeef Salahuddin had been exploring new ways of computing using simulated networks of devices with "tunable" randomness. The devices output a string of bits that are random, but can be tuned to produce more of one bit than the other. The device is named a p-bit to note the controlled probability of the output.
You can check out their research effort in their paper in IEEE Electron Device Letters. Their paper is "Implementing p-bits with embedded MTJ." (MTJ stands for magnetic tunnel junctions.)
Why this is important: "Some important aspects of modern computing—notably encryption—depend on there being a significant difference in difficulty between multiplication and its inverse, factoring. But the engineers are cautious about the technology's potential for code breaking," said Moore.
In the absence of a p-bit, Salahuddin at UC Berkeley suggested to Datta and Camsari that a magnetic RAM cell combined with a transistor might work; the latter two showed it to be true, said Moore.
Datta of Purdue will lead the team to continue research efforts on building circuits that are capable of reverse computing, said TechSpot. "Datta's group hasn't built p-bits yet," said Moore, "but they've simulated them and are seeking access to a foundry that can do the job."
Camsari, meanwhile, a post-doctoral researcher at the School of Electrical and Computer Engineering at Purdue, stated on a Purdue page that his post-PhD focus has been to use the modular approach "to establish a new kind of neuromorphic computing platform based on probabilistic (p)-bits and p-circuits as a hardware solution for a wide range of Boolean and non-Boolean problems."
More information: Kerem Yunus Camsari et al. Implementing p-bits With Embedded MTJ, IEEE Electron Device Letters (2017). DOI: 10.1109/LED.2017.2768321
Magnetic tunnel junctions (MTJs) utilizing unstable magnets with low barriers have been shown to be well-suited for the implementation of random number generators (RNGs). It has recently been shown that completely new applications involving optimization, inference, and invertible Boolean logic would be enabled if many RNGs can be interconnected to form large scale correlated networks. However, this requires a new device, namely, a three-terminal tunable RNG or a p-bit, whose input terminal can be used to pin its output to 0 or 1. In this letter, we show that a voltage driven p-bit can be implemented simply by incorporating existing RNGs into a transistor circuit using experimentally demonstrated 2-terminal MTJs, without requiring a new device. Using established SPICE models, we show that this proposed p-bit can be interconnected to build correlated p-circuits to implement useful functionalities including a representative example of an invertible AND gate that "factors" the output of an AND gate into consistent input combinations.
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