This article has been reviewed according to Science X's editorial process and policies. Editors have highlighted the following attributes while ensuring the content's credibility:

fact-checked

trusted source

proofread

Researchers develop spintronic probabilistic computers compatible with current AI

Researchers develop spintronic probabilistic computers compatible with current AI
A photograph of the proof-of-concept of the spintronic probabilistic computer consisting of sMTJ-based p-bit unit (left side) and Field-Programmable Gate Array (FPGA) (right side). Credit: Tohoku University

Researchers at Tohoku University and the University of California, Santa Barbara, have shown a proof-of-concept of energy-efficient computer compatible with current AI. It utilizes a stochastic behavior of nanoscale spintronics devices and is particularly suitable for probabilistic computation problems such as inference and sampling.

The team presented the results at the IEEE International Electron Devices Meeting (IEDM 2023) on December 12, 2023.

With the slowing down of Moore's Law, there has been an increasing demand for domain-specific hardware. A probabilistic computer with naturally stochastic building blocks (probabilistic bits, or p-bits) is a representative example due to its potential capability to efficiently address various computationally hard tasks in machine learning (ML) and artificial intelligence (AI).

Just as quantum computers are a natural fit for inherently quantum problems, room-temperature probabilistic computers are suitable for intrinsically probabilistic algorithms, which are widely used for training machines and computational hard problems in optimization, sampling, etc.

Recently, researchers from Tohoku University and the University of California Santa Barbara have shown that robust and fully asynchronous (clockless) probabilistic computers can be efficiently realized at scale using a probabilistic spintronic device called stochastic magnetic tunnel junction (sMTJ) interfaced with powerful Field Programmable Gate Arrays (FPGA).

  • Researchers develop spintronic probabilistic computers compatible with current AI
    (a) Stack structure used in previous (left) and present (right) works. (b) Measured output signal of the p-bit showing microsecond random telegraph noise. Credit: Tohoku University
  • Researchers develop spintronic probabilistic computers compatible with current AI
    (a) Output signal from the sMTJ-based p-bit enforced to perform Bayesian network. The Asia network, a textbook example of the Bayesian network is tested. (b) Experimental results of the operation. Credit: Tohoku University

Until now, however, sMTJ-based probabilistic computers have been only capable of implementing , and developing the scheme to implement feedforward neural networks have been awaited.

"As the feedforward neural networks underpin most modern AI applications, augmenting probabilistic computers toward this direction should be a pivotal step to hit the market and enhance the computational capabilities of AI," said Professor Kerem Camsari, the Principal Investigator at the University of California, Santa Barbara.

In the recent breakthrough to be presented at the IEDM 2023, the researchers have made two important state-of-the-art advances. First, leveraging earlier works by the Tohoku University team on stochastic magnetic tunnel junctions at the device level, they have demonstrated the fastest p-bits at the circuit level by using in-plane sMTJs, fluctuating every ~microsecond or so, about three orders of magnitude faster than the previous reports.

Second, by enforcing an update order at the computing hardware level and leveraging layer-by-layer parallelism, they have demonstrated the basic operation of the Bayesian network as an example of feedforward stochastic neural networks.

"Current demonstrations are small-scale, however, these designs can be scaled up by making use of CMOS-compatible Magnetic RAM (MRAM) technology, enabling significant advances in applications while also unlocking the potential for efficient hardware realization of deep/convolutional ," said Professor Shunsuke Fukami, the principal investigator at Tohoku University.

More information: Nihal Sanjay Singh et al, Hardware Demonstration of Feedforward Stochastic Neural Networks with Fast MTJ-based p-bits, 2023 IEEE International Electron Devices Meeting (IEDM) (in press) (2023)

Provided by Tohoku University
Citation: Researchers develop spintronic probabilistic computers compatible with current AI (2023, December 13) retrieved 23 February 2024 from https://techxplore.com/news/2023-12-spintronic-probabilistic-compatible-current-ai.html
This document is subject to copyright. Apart from any fair dealing for the purpose of private study or research, no part may be reproduced without the written permission. The content is provided for information purposes only.

Explore further

Researchers develop a scaled-up spintronic probabilistic computer

111 shares

Feedback to editors